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Bridge modal analysis under Kernel clock distribution due to sampling jitter: single-output identification

Author(s): (Middle East Technical University Northern Cyprus Campus, Sustainable Environment and Energy Systems Program, Turkey)
(University College Dublin, School of Civil Engineering, Ireland)
Medium: journal article
Language(s): English
Published in: Proceedings of the Institution of Civil Engineers - Smart Infrastructure and Construction
Page(s): 1-12
DOI: 10.1680/jsmic.21.00019
Structurae cannot make the full text of this publication available at this time. The full text can be accessed through the publisher via the DOI: 10.1680/jsmic.21.00019.
  • About this
    data sheet
  • Reference-ID
    10730553
  • Published on:
    30/05/2023
  • Last updated on:
    04/08/2023
 
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